Glass Interposer vs Glass Core Substrate: TSMC CoPoS vs Intel EMIB Explained
Glass Interposer vs Glass Core Substrate:
TSMC CoPoS vs Intel EMIB Explained
They're both called "glass substrates" — but they solve completely different problems. The race to define AI chip packaging's future is playing out between two very different bets.
Glass interposers replace the silicon bridge between GPU and HBM dies. Glass core substrates replace the entire organic base layer of a chip package. TSMC is betting on the former. Intel is pushing the latter. Same material — completely different strategy.
Why Glass Now — The Limits of Organic Substrates
The AI accelerator era has pushed semiconductor packaging requirements beyond what traditional organic substrates (ABF » Ajinomoto Build-up Film) can handle. Integrating multiple GPUs and dozens of HBM dies into a single package — like Nvidia's GB200 or AMD's MI300X — demands materials with superior thermal and dimensional stability.
The core problem is CTE mismatch. Organic substrates expand at roughly 7–14 ppm/°C. Silicon sits at 2.6 ppm/°C. Every thermal cycle stresses solder joints and causes warpage. As package sizes scale up for AI workloads, this mismatch compounds exponentially.
Glass can be tuned to 3–9 ppm/°C — far closer to silicon. Its surface is up to 5,000× smoother than organic alternatives, enabling sub-2µm redistribution layer (RDL) routing impossible on organic substrates. Dielectric loss is lower too, improving signal integrity at high frequencies. But which layer glass replaces determines everything about how it's manufactured and who wins.
The Two Technologies — Not the Same Thing
A chip package, viewed from bottom to top » Substrate » Interposer » Dies. Glass can enter at either layer, and that choice defines a completely different product.
(CoPoS Approach)
(EMIB Approach)
The simplest summary » A glass interposer is a glass bridge that connects chips. A glass core substrate is a glass foundation that the entire package is built on.
TSMC's CoPoS — The Panel-Scale Glass Interposer Bet
TSMC's approach is CoPoS (Chip-on-Panel-on-Substrate) — replacing the silicon wafer in its existing CoWoS architecture with a large glass panel as the interposer. In 2025, TSMC unveiled a 310×310mm CoPoS product line. The roadmap calls for a mini pilot line at VisEra in 2026, small-volume trial production in 2027, and mass production between 2028 and 2029.
TSMC's rationale is strategic: preserve the CoWoS ecosystem while introducing glass's advantages. Existing customer relationships with Nvidia, AMD, and Apple remain intact. Design tools, packaging flows, and supply chains require minimal disruption. It's an evolutionary path — not a clean-sheet redesign.
The technical challenge is real, however. CoPoS glass interposers must be thinner (~400µm) and meet tighter CTE tolerances than glass used as a substrate core. Closing the interconnect density gap versus silicon interposers — where TSMC's CoWoS already excels — remains the key engineering hurdle. TSMC is co-developing specialized glass carriers with Corning's Taiwan facility to address this.
Intel's EMIB + Glass Core — A Decade of R&D Paying Off
Intel committed glass core substrates to its advanced packaging roadmap in 2023. In January 2026, at NEPCON Japan, it unveiled the industry's first sample combining EMIB (Embedded Multi-die Interconnect Bridge) with a thick glass core substrate — a milestone that validated years of internal R&D.
The sample's specs are significant » 78×77mm package, 10-2-10 architecture (10 RDL layers top » 2 glass core layers » 10 RDL layers bottom, 22 layers total), 800µm total thickness, 45µm bump pitch. Most critically: Intel reported achieving "No SeWaRe" — zero micro-cracking during processing. SeWaRe (from Japanese 背割れ, meaning "back crack") has been the primary yield killer for glass substrate manufacturing.
Intel's logic is more disruptive. By embedding chiplets, HBM, and EMIB bridges directly into a glass core, the interposer layer becomes unnecessary. Package footprint shrinks. Power consumption drops. Signal paths shorten. Intel holds 600+ patents in this space and is exploring licensing arrangements that could accelerate industry-wide adoption.
CoPoS vs EMIB Glass Core — Spec by Spec
| Metric | TSMC CoPoS (Glass Interposer) |
Intel EMIB (Glass Core Substrate) |
|---|---|---|
| Function | GPU↔HBM bridge layer | Full package core replacement |
| Panel Size | 310×310mm (large panel) | 78×77mm (sample) |
| Thickness | ~400µm (thinner) | ~800µm (dual core layers) |
| Interposer Required? | Yes — glass IS the interposer | No — integrated into core |
| Ecosystem Compatibility | CoWoS infrastructure preserved | New process infrastructure needed |
| Interconnect Density | Below silicon (improving) | 45µm bump pitch achieved |
| Mass Production Target | 2028–2029 | 2026–2030 (phased) |
| Key Challenge | Routing density vs silicon | SeWaRe (micro-crack), yield |
| Primary Customers | Nvidia, AMD, Apple (evaluating) | Intel Foundry customers |
Who's Playing — and Where They Stand
What Big Tech Is Actually Choosing
Nvidia's near-term focus is CoPoS — integrating glass interposers within its existing CoWoS packaging ecosystem. This is the fastest path to deploying glass without rebuilding supply chains. However, Ibiden's continued heavy CapEx into organic substrate lines for Nvidia suggests the transition won't happen overnight.
AMD has confirmed the most concrete glass roadmap among chipmakers: glass interposers for semiconductor interposer applications in 2026 (pilot), with product integration in 2028. Apple and Tesla are evaluating glass substrates for data center and AI infrastructure applications. Broadcom — which controls 55–60% of the global ASIC market — is conducting performance evaluations that, if positive, could rapidly scale glass substrate adoption across the industry.
2026–2030 Commercialization Roadmap
These two technologies are more likely to coexist than compete
Glass interposers and glass core substrates use the same material but address different problems at different layers of the package stack. TSMC's CoPoS is the pragmatic short-term strategy — maximize compatibility with the existing CoWoS ecosystem while displacing costly silicon interposers. Intel's glass core substrate is the more disruptive long-term vision — eliminate the interposer entirely.
Near-term (2026–2028): TSMC CoPoS reaches market first. Infrastructure advantages and existing customer relationships give it early momentum. Long-term (2028–2030+): Intel-style glass core substrates could fundamentally restructure the packaging stack — if yield and supply chain scale up.
The single most important variable to watch » which approach Nvidia selects for its next-generation GPU architecture. Nvidia's packaging decision becomes the industry's de facto standard.
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