TGV — Why Drilling Holes Through Glass Is the Hardest Problem in Packaging
TGV — Why Drilling Holes Through Glass Is
the Hardest Problem in Packaging
Through-Glass Vias are the single biggest technical barrier to glass substrate mass production. Here's what makes them so difficult — and who's closest to solving it.
Ask any expert what the hardest part of manufacturing a glass substrate is, and they'll give you the same answer: drilling the holes. What sounds almost trivially simple hides one of the most demanding engineering challenges in the history of semiconductor packaging.
By now it's industry consensus that glass substrates outperform ABF (Ajinomoto Build-up Film) on thermal expansion, planarity, and high-frequency signal loss. But translating those material advantages into an actual product requires clearing one formidable hurdle: drilling thousands of vertical holes — tens of micrometers in diameter — through glass without cracking it, then filling every one perfectly with copper. That process is the Through-Glass Via, or TGV.
What Is a Via and Why Does Glass Make It So Hard?
A chip mounted on a substrate needs to pass electrical signals down to the PCB below. The vertical conductive channels that carry those signals through the substrate are called vias. ABF substrates use laser-drilled copper-filled microvias; silicon interposers use TSVs (Through-Silicon Vias). Glass substrates need the equivalent: TGVs.
The problem is glass's fundamental nature. Glass is a brittle material — it fractures without deforming. Unlike metal or silicon, you can't simply drill into it incrementally. And the via diameters that advanced packaging demands are smaller than half a human hair (sub-30μm). Thousands of those holes, in exact positions, without cracking the substrate: that's the TGV challenge.
A human hair is roughly 70μm in diameter. TGV target diameters range from 20–50μm. That density also means — in theory — 4× more vias per unit area than ABF can support. The keyword is "in theory."
Three Ways to Drill Glass — None Perfect
There are three main approaches to forming holes in glass substrates. None has reached the yield and throughput required for high-volume manufacturing. Dozens of companies are competing on exactly this problem right now.
Push for precision and throughput collapses. Push for speed and yield falls apart. Drilling tens of thousands of TGVs across a large-format glass panel (300mm+), without cracking, uniformly, at production speed — satisfying all three simultaneously is the defining challenge of TGV engineering.
Drilling Is Only Half the Problem — Filling Is Harder
Forming the holes doesn't complete a TGV. Depositing a uniform copper seed layer on the inner walls — and then filling the cavity void-free through electroplating — is an equally demanding challenge.
Unlike metal or silicon, glass is electrically inert. Before plating can begin, the surface must be activated, a seed layer deposited by PVD, and plating bath conditions precisely controlled to ensure uniform electrolyte exchange deep inside narrow vias. If any condition drifts, a void forms — an unfilled pocket in the copper. That single void, in one via among millions, causes an open circuit. In a thermal cycling reliability test (−55°C ↔ +125°C), stress concentrates around voids, and after hundreds of cycles the via fails — taking the entire package with it.
A single void in a TGV can survive initial electrical testing and still cause field failure after thermal stress. In a package housing a $10,000+ AI accelerator chip, one open circuit writes off the entire assembly. This is why void-free fill yield is treated as a make-or-break metric.
Yield Is the Real Barrier — Where the Industry Stands
TGV yield levels vary by player, but virtually no one has publicly claimed to reach the industry-standard threshold for high-volume manufacturing (typically 99.9%+). Below is a relative technology maturity estimate based on public statements and industry sources.
※ No public figures available. Relative maturity estimates based on aggregated industry sources.
The Competitive Map — Who's Where
| Category | Key Players | Strengths | Status |
|---|---|---|---|
| Equipment | Philoptics (KR) LPKF (DE) |
Most TGV equipment references LIDE process IP |
Abseis supply |
| Glass Material | Corning (US) AGC / NEG (JP) |
Large-format panel supply Optical glass expertise |
Pilot stage |
| Substrate Mfg. | Absolics (SKC) Samsung Electro-Mech. |
First dedicated fab lines Large-scale pkg. know-how |
Pilot production |
| Plating Chemistry | YCChem (KR) Soulbrain (KR) |
TGV-specific plating fluids Etchant co-development |
Supply chain entry |
| End Customers | AMD · Amazon Intel (external pivot) |
AI accelerator packaging Data center scale |
2027–2028 target |
Beyond TGV — What Comes Next
TGV is the first major wall in glass substrate manufacturing, but not the only one. Once vias are formed and filled, the stack still faces redistribution layer (RDL) patterning, chip-to-substrate bonding reliability, and planarity maintenance across large panels — each a nontrivial challenge in its own right.
Yet TGV commands the most R&D attention for a simple reason: whoever masters stable, high-yield TGV formation controls the critical bottleneck in the glass substrate supply chain. The technology itself is the moat. Yield is the barrier to entry, and yield is the business advantage.
TGV looks deceptively simple — drill holes through glass, fill with copper — but satisfying precision, throughput, and yield simultaneously makes it one of the most demanding processes in packaging history. All three drilling approaches (CO₂, UV/ps laser, LEAP) carry their own limits, and void-free copper fill adds another layer of complexity. Philoptics and LPKF lead on equipment; Absolics and Samsung Electro-Mechanics are in pilot production. Customer adoption by AMD, Amazon, and a pivoting Intel looks most realistic in 2027–2028.
Comments
Post a Comment