Glass Substrate Series · 04

The Chiplet Era's Interposer —
How Glass Replaces Silicon

What changes when you swap a silicon interposer for glass in 2.5D and 3D packaging? Cost, signal loss, thermal trade-offs — and the full company map driving the transition.

Glass SubstrateChiplets · InterposerIntermediate~10 min read

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The semiconductor industry is entering the chiplet era. Instead of one monolithic die, multiple smaller chips connect inside a single package. The component bridging them is the interposer — and right now, that interposer's material is shifting from silicon to glass.

Chiplet architectures took off for a straightforward reason: monolithic dies have physical scaling limits, and yield collapses as die area grows. AMD's EPYC, Intel's Ponte Vecchio, and Nvidia's next-generation GPUs are all moving toward multi-die integration in a single package.

In this architecture, the interposer is the connective tissue between chiplets. And glass is now being seriously evaluated as that connective tissue.

What Is an Interposer and Why Does It Matter?

An interposer is an intermediate layer placed between chips and the substrate — a relay board bridging the chip's fine-pitch bump spacing (tens of micrometers) to the substrate's comparatively coarser wiring.

In 2.5D packaging, multiple chiplets sit side by side on the interposer, which handles the high-speed data connections between them. Nvidia's H100 GPU connects to its HBM memory stack through exactly this kind of 2.5D structure.

📐 2.5D vs 3D Packaging

2.5D — Chiplets arranged horizontally on an interposer. Short interconnect distances mean high bandwidth and low signal loss.
3D — Dies stacked vertically for maximum integration density, but heat dissipation becomes significantly harder. Both rely on the interposer as a key structural element.

Silicon Interposer vs Glass Interposer — Structure Comparison

Silicon vs Glass — What Actually Differs

The incumbent standard for 2.5D packaging has been the silicon interposer. TSMC's CoWoS (Chip on Wafer on Substrate) is the most prominent example. So why switch to glass?

🔲 Silicon Interposer

Wafer-process costs are very high

Area limited by 300mm wafer size

Requires TSV process (complex, costly)

High thermal conductivity — good heat dissipation

Mature technology with established references

✦ Glass Interposer

Panel-process enables large-area, lower cost

500mm+ panels possible

TGV replaces TSV (yield still improving)

Low thermal conductivity — needs thermal management

Lower dielectric loss than silicon

⚠ Glass's Achilles Heel — Thermal Management

Glass has roughly 100× lower thermal conductivity than silicon. If heat from chiplets can't dissipate fast enough, performance throttles and reliability suffers. Glass interposers require additional thermal management — heat spreaders, thermal vias — that silicon handles more naturally.

💡 Panel Process Economics

A 300mm silicon wafer vs a 500×500mm glass panel. By area alone, the glass panel is roughly 2.8× larger. For the same interposer size, glass theoretically yields more than twice as many units per substrate. When yields reach parity, the cost equation flips.

Trade-off Summary — Side by Side

Metric	Silicon Interposer	Glass Interposer	Winner
Manufacturing Cost	Very High Wafer process	Lower (potential) Panel process	🟢 Glass
Signal Loss	Moderate Df ~0.001	Low Df ~0.0003	🟢 Glass
Thermal Management	Excellent 148 W/mK	Challenging 1–2 W/mK	🔴 Silicon
Scalability	Limited 300mm ceiling	Favorable 500mm+ panels	🟢 Glass
Flatness	Good	Excellent ±1μm or better	🟢 Glass
Tech Maturity	High CoWoS in production	Developing Pilot stage	🔴 Silicon
Yield	Stable	Improving TGV yield is key	🔴 Silicon

The Companies Driving This Transition — Full Value Chain Map

The glass interposer ecosystem breaks into four layers: materials → equipment → substrate manufacturing → end customers. Here's who sits where, and what their position means.

🏭 Substrate Manufacturers — The Front Line

Absolics Korea

SKC subsidiary · Glass substrate specialist

Leading

Pilot fab operational in Covington, Georgia, USA. Co-development programs running with AMD and Amazon. Industry's first company to run an actual glass substrate production line.

Targeting AI accelerator glass interposer supply by 2027

Samsung Electro-Mechanics Korea

ABF leader pivoting to glass

Developing

Leveraging its dominant ABF substrate position to develop glass substrates in-house. Vertical integration with Samsung Electronics' system semiconductor division is a key strategic advantage.

Pursuing vertical integration with internal packaging lines

Shinko Electric Japan

Silicon interposer incumbent

Transitioning

Major supplier of silicon interposers for TSMC's CoWoS. Transferring its silicon interposer expertise to glass. History of collaboration with IBM and Intel.

Existing customer base gives smooth transition advantage

⚙️ Equipment — The TGV Process Gatekeepers

Philoptics Korea

TGV laser drilling equipment

Delivered

TGV laser drilling equipment delivered to Absolics' pilot line. Holds the most advanced reference in the Korean glass substrate ecosystem. Direct beneficiary of Absolics' production ramp.

Positioned for direct volume uplift as Absolics scales

LPKF Germany

LIDE process IP holder

Tech Leader

Developed Laser-Induced Deep Etching (LIDE) — modifying glass internally before etching to minimize cracking. Patent portfolio creates a meaningful moat in the global TGV equipment market.

Proprietary IP forms a durable competitive barrier

🧪 Materials & Plating — The Hidden Critical Layer

YCChem Korea

TGV-specific plating chemistry

Supply chain entry

Developing copper plating solutions specifically formulated for TGV void-free fill. The additive chemistry that prevents voids is the key technical differentiator. Entered Absolics' supply chain.

Plating chemistry is a hidden but critical yield lever

Soulbrain Korea

Etchants · Cleaning chemicals

Supply chain entry

Semiconductor etchant leader developing HF-based specialty etchants for glass substrate wet etching. Potential supply link to Samsung Electro-Mechanics' glass line.

Broad semiconductor chemical portfolio reduces customer friction

Corning USA

Glass panel material

Pilot

World's #1 display glass producer, developing ultra-flat glass panels for semiconductor packaging. In supply discussions with Absolics and other substrate manufacturers.

Upstream glass panel oligopoly — potential supply chain control

🎯 End Customers — The Demand That Decides Everything

Intel USA

Official glass substrate roadmap

2028 target

Announced glass substrate roadmap in 2023. Shifted strategy toward external procurement rather than in-house production. Absolics and Samsung Electro-Mechanics are primary supply candidates.

Intel's adoption decision is the single biggest market trigger

AMD USA

Absolics co-development partner

Active partner

Co-developing glass interposers for AI accelerators with Absolics. Evaluating glass for next-generation EPYC and Instinct series packaging to reduce silicon interposer costs.

Silicon interposer cost reduction is the primary driver

Amazon (AWS) USA

Custom AI chip packaging

Evaluating

Participating as a pilot test partner at Absolics' facility, targeting cost reduction for Trainium and Inferentia custom AI chip packaging.

Hyperscaler adoption means immediate large-volume demand

Who, When — Adoption Timeline

2023–24

Intel announces glass roadmap · Absolics pilot line opens

Intel publicly commits to glass substrates for its 2030 trillion-transistor goal. Absolics' Georgia fab opens. Philoptics delivers TGV equipment. AMD and Amazon begin testing.

2024–25

Active co-development · Supply chain formation

AMD and Amazon run real AI accelerator packaging tests at Absolics. YCChem and Soulbrain enter the materials supply chain. Samsung Electro-Mechanics accelerates internal glass development.

2026–27

Early production — AI accelerators first

Selected data center AI accelerator models begin using glass interposers. Silicon interposers remain dominant in parallel. Materials supply from YCChem and Soulbrain scales up.

2028+

Intel external procurement pivot · Silicon displacement begins

Intel transitions to external glass substrate procurement. TGV yield stabilization and mature thermal solutions enable broad silicon interposer displacement.

📌 Key Takeaways

The chiplet era's interposer is the bridge between dies. Glass holds clear advantages on cost, signal integrity, and scalability — with thermal management and TGV yield as the remaining blockers. Absolics and Samsung Electro-Mechanics lead substrate manufacturing; Philoptics and LPKF control the equipment layer; YCChem, Soulbrain, and Corning supply the materials. Intel, AMD, and Amazon are the demand anchors. Early AI accelerator adoption by 2026–2027, broad silicon displacement from 2028 onward.

Glass SubstrateChipletsInterposer 2.5D PackagingAbsolicsPhiloptics YCChemIntelAMDCorning

← Previous · 03

TGV — Why Drilling Holes Through Glass Is the Hardest Problem in Packaging

Laser drilling, yield challenges, and void-free copper fill

Next · 05 →

AI Accelerators & HBM — How Glass Reduces Signal Loss

How dielectric loss (Df) advantages translate directly to AI chip performance